;NUNIO CONFIGURATION ; ;******************************************************************************** ;*To configures NUNIO modules for use with WRTADS 5.0 with the * ;*Sealevel PCMCIA card set 1 channel with: * ;* Tx clock source is internal (collumn 8=0) * ;* Tx clock phase is inverted (collumn 9=1) * ;* Tx data inversion is normal (collumn 10=0) * ;* Tx baud rate is 9600 (collumn 11=3) * ;* All other settings are as normal * ;* * ;*To configure NUNIO modules for use with a MX-6 card and to * ;*send to ARTCC set 3 channels with: * ;* Tx clock source is external (collumn 8=1) * ;* Tx clock phase is normal (collumn 9=0) * ;* Tx data inversion is inverted (collumn 10=1) * ;* Tx baud rate is 2400 (collumn 11=1) * ;* All other settings are as normal * ;******************************************************************************** ; ; ;Change History ;Issue Date Author Reason for Change ; ;1.0 20/05/99 KF Initial version ;2.0 20/02/02 JA SDLK ;3.0 06/03/02 JA Single channel use ;4.0 29/04/02 PB & JA OT&E modem setup ;5.0 10/07/02 R. Cain Putnam Setup ;6.0 24/07/02 JA Putnam Setup to Center ; DP6 78=96 ;Total throughput = 9600 DP37 05=1 ;Number of channels per module = 1 DP37 01=3 ;Number of modules fitted = 3 ; ; Configure NUNIO #1 ; ;1) Host IP address [0 - FFFFFFFF] ;2) Host data port [1 - 65535] ;3) Status report period [0 - 86400] in seconds ;4) Error report level [0 - 4] 0 = critical, 1 = error, 2 = warning etc ;5) Error report state [0 - 1] 0 = disable, 1 = enable = FPS-117 ;6) Packet report period [20 - 1000] in milliseconds ;ref line 1 2 3 4 5 6 NUCM 1 = C009C8FF 2000 30 4 1 50 ; ; Configure Each Channel. ; 1) Overflow threshold [1 - 65535] ; 2) Tx state [0 - 1] 0 = disable, 1 = enable ; 3) Overflow state [0 - 1] 0 = disable, 1 = enable ; 4) Overflow channel [1 - 4] the channel to overflow to ; 5) Tx format [0 - 255] 0 = QM, 1 = CD1, 2 = FPS-117 ; 6) Serial interface [0 - 1] 0 = RS232, 1 = EIA-530 ; 7) Tx data encoding [0 - 4] 0 = NRZ, 1 = NRZI mark, 2 = FM0, etc ; 8) Tx clock source [0 - 1] 0 = internal, 1 = external ; 9) Tx clock phase [0 - 1] 0 = normal, 1 = inverted ;10) Tx data inversion [0 - 1] 0 = normal, 1 = inverted ;11) Tx baud rate [0 - 8] 1 = 2400, 2 = 4800, 3 = 9600, etc ;12) Async data bits [0 - 1] 0 = 8 data bits, 1 = 7 data bits ;13) Async stop bits [0 - 1] 0 = 1 stop bit, 1 = 2 stop bits ;14) Async parity [0 - 2] 0 = none, 1 = odd, 2 = even ;15) Async flow control [0 - 1] 0 = none, 1 = XON/XOFF ; ;ref lines 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NUCC 1 1 = 200 1 1 2 1 0 0 1 0 1 1 0 0 0 0 NUCC 1 2 = 200 1 1 3 1 0 0 1 0 0 1 0 0 0 0 NUCC 1 3 = 200 1 1 4 1 0 0 1 0 0 1 0 0 0 0 NUCC 1 4 = 200 0 0 1 1 0 0 0 1 0 3 0 0 0 0 ; ; Save the Configuration. NUSC 1 ; ; Configure NUNIO #2 ; NUCM 2 = C009C8FF 2000 30 4 1 50 ;ref lines 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NUCC 2 1 = 200 1 0 2 1 0 0 1 0 1 1 0 0 0 0 NUCC 2 2 = 200 0 1 3 1 0 0 0 1 0 3 0 0 0 0 NUCC 2 3 = 200 0 1 4 1 0 0 0 1 0 3 0 0 0 0 NUCC 2 4 = 200 0 0 1 1 0 0 0 1 0 3 0 0 0 0 NUSC 2 ; ; Configure NUNIO #3 ; NUCM 3 = C009C8FF 2000 30 4 1 50 ;ref lines 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NUCC 3 1 = 200 1 1 2 1 0 0 0 1 0 3 0 0 0 0 NUCC 3 2 = 200 0 1 3 1 0 0 0 1 0 3 0 0 0 0 NUCC 3 3 = 200 0 1 4 1 0 0 0 1 0 3 0 0 0 0 NUCC 3 4 = 200 0 0 1 1 0 0 0 1 0 3 0 0 0 0 NUSC 3